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Degree
Design of CMOS low power voice activity detector
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Full Text
Lin, Jin Hai
Un, Ka Fai
2023.
Master
Design of FPGA-based and ASIC deep neural network digital accelerator
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Chen, Jia Bao
Un, Ka Fai
2022.
Master
Design of FPGA-based deep neural network digital accelerator
Cao, Ru Jian,
Un Ka Fai
2024.
Master
Monotonic multi-switching method for ultra-low-voltage energy efficient SAR ADCs
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Wu, Wen Lan
U, Seng-Pan
2013.
Master
Semi-MASH sigma-delta A-to-D converter for high-speed high-resolution applications
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Lao, Chon In
U, Seng-Pan
2014.
Master
Applying the novel high speed robust level converter to a 12-bit successive approximation analog-to-digital converters with dual supply domain
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Lei, Cheok Teng
U, Seng-Pan
2013.
Master
Design of analog-to-digital converters with binary search algorithm and digital calibration techniques
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Wong, Si Seng
U, Seng-Pan
2011.
Master
A study on comparator and offset calibration techniques in high speed Nyquist ADCs
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Chan, Chi Hang
U, Seng-Pan
2011.
Master
Speed enhancement techniques for comparator-based switched-capacitor circuits
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Wong, Kim Fai
U, Seng-Pan
2010.
Master
Macromodels of A/D and D/A converters with PSPICE
Chou, On Sek
To, Ching-Nai
1997.
Master
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