Two parts have been presented in this thesis. The first part presents an ultra-low-power capacitance-to-digital converter (CDC) for digital microfluidics systems that demand a wide capacitive sensing range. It is structured with a switched-capacitor capacitance-to-current front-end interface, followed by a differential current-mode successive approximation register (SAR) analog-to-digital converter (ADC). By using subthreshold-biased transistors, the differential current-mode SAR ADC significantly saves power and reduces sensitivity to supply voltage and clock variation. The 8-bit 1-kS/s CDC designed in 0.35-ȝm CMOS exhibits a capacitance sensing range from 1.5 to 20 pF while consuming a total power of 0.8 ȝW. The ENOB of the current SAR ADC is 7.46. The second part presents an ultra-low power 13 bits resolution SAR ADC with effective calibration system used in bio-potential acquisition system, designed in 0.18 ȝm CMOS. The optimized switching methods can save lots of power consumption, and a dual-supply voltage with level-shifter theory applied in the SAR logic part effectively cut down the power consumption in digital part. Calibration is necessary for high resolution SAR ADC, especially the split architecture, two steps calibration are operated in this proposed work and stored the measured data of capacitor both parasitic and mismatch error by the calibration CADCs and DFFs. The total power of SAR ADC in conversion is only 97.6nW, 11.8 ENOB with the FoM of 27.4 fJ/c.s in post-simulation, the core area of the proposed work is only occupied 0.094mm2 .