SPICE is a powerful, general-purpose circuit analysis program that simulates analog circuits. Today, SPICE (Simulation Program with Integrated Circuit Emphasis) is the most popular circuit simulation program and being used by both practicing engineers and students. Therefore, SPICE is not convenient to apply in digital systems (sampled systems) because of the longer computational time. This thesis is to use a new approach to simulate digital circuits using macromodeling method with PSPICE. It is well known that digital circuits are using boolean algebra and analog circuits are using ordinary algebra. The principle for this approach is to express boolean algebra by ordinary algebra. Due to the advance of MOS technology, hybrid analog and digital (A/D) Integrated Circuits (IC's) are getting more common especially in the Telecommunication field and Mixed A/D simulation is extremely needed for such macromodels of new IC's. Phase Locked Loop (PLL) is an important device in all electronic communication systems such as Microwave Link System, Primary and Secondary Radar Systems, Trunk Mobile Radio System...etc. A new approach to model Mixed Mode Phase Locked Loop (MPLL) using mixed mode (digital & analog) with simulation program SPICE is proposed. There are two methods called new method and library method to macromodel the MPLL. MPLL can be macromodeled by these two methods using both analog simulator and digital simulator. MPLL simulation results will be shown and found out the advantage in memory saving but longer running time by using new method rather than the library method using some build-in digital models from library. Moreover, the heart of every PLL is either an analog or digital phase detector. Therefore, macromodel of X-OR phase detector (X-PD), three state frequency phase detector (FPD) and 555 oscillator will be used for constructing the MPLL throughout this thesis work. Also, simulation program of PSPICE 6.2 (Window version for student) & 5.0 (Professional version) as a reference, is being used and running by a PC with Pentium 586 (90MHz) and 16M RAM. In fact, version 6.2 is much flexible than version 5.0 because the former can trace the output waveform during simulation. It means that the abnormal phenomenon of the output can be observed during simulation. The disadvantage of version 6.2 is that the capability of component size is less than version 5.0. For this project, version 6.2 can deal with such system. Once again, there are two methods called new method and library method to macromodel the MPLL. According to the simulation results of MPLLs, new method has the advance in memory use and the library method has the advance in time saving while the A/D and D/A interface subcircuits are no longer necessary. Here, a new index named MT index is introduced for indicating which method is the best (smallest value of MT). MT index is defined as the Memory use (M) multiplies the total build time (T).